Editorial review: 9 October 2026
Answer embedded-systems questions with explicit assumptions
Embedded-systems interview preparation needs actual technical questions, worked reasoning and clear limits. A list of career tips cannot show whether you understand a bit mask, counter wraparound or a buffer state. Equally, a correct numerical exercise does not establish that code is safe on a particular microcontroller.
This guide provides original worked questions about bits, timers, buffer capacity and volatile access. They are author-created practice questions, not leaked employer questions, official assessment keys or tests run on real hardware. Device-specific registers, interrupt priorities and timing require the actual target documentation.
The primary references are GCC's volatile documentation and the SEI CERT C unsigned-integer rule. They support the narrow language and compiler points attributed below. The numerical models and traces are editorial originals.
Question 1: set and clear a bit without losing other bits
Question: In an abstract eight-bit value, start with 0x2D. Set bit 1, then clear bit 3. Number bits from zero at the least significant bit. What is the final value, and is bit 5 set?
Write the starting value in binary: 0x2D = 0010 1101, decimal 45. Bit 1's mask is 0000 0010, or 0x02. Setting that bit with OR gives 0010 1111, which is 0x2F, decimal 47.
Bit 3's mask is 0000 1000, or 0x08. To clear it in this explicitly eight-bit model, use the eight-bit complement 1111 0111, or 0xF7. The result is:
Start: 0010 1101 = 0x2D = 45
Set bit 1: 0010 1111 = 0x2F = 47
Clear bit 3:0010 0111 = 0x27 = 39
Bit 5 mask: 0010 0000 = 0x20
0x27 AND 0x20 = 0x20, so bit 5 is set.
The final value is 0x27, decimal 39. The operation changes bits 1 and 3 as requested; it does not clear every other bit. Explaining the intermediate value helps a listener check the operation rather than merely accept a hexadecimal answer.
Question 2: why is that not automatically a safe register write?
Question: Can you apply the same read-modify-write sequence to any hardware register?
No such guarantee follows from the arithmetic. The exercise specifies an abstract stored value, not a device register. A real register may have write-one-to-clear bits, read side effects, reserved bits or changes made concurrently by hardware. Without its datasheet and access requirements, the numerical operation does not establish an appropriate register write.
An interview answer can say which missing details would change the design: the register's documented read and write semantics, the allowed access width, whether a peripheral or interrupt can change its bits, and whether the device supplies dedicated set/clear registers. Do not invent those properties for an unnamed target.
For a changed-input numerical exercise, set bit 6 in 0x27. The mask is 0x40, and OR gives 0x67, decimal 103. This is a second abstract bit calculation, not a test of any real peripheral.
Question 3: compute elapsed ticks across a counter wrap
Question: An abstract counter counts upward and wraps modulo 256. An earlier reading is 250 and a later reading is 7. Assume fewer than 256 ticks elapsed between readings. How many ticks elapsed?
The modular difference is (7 − 250) modulo 256. The ordinary integer difference is −243; adding 256 gives 13. One direct check is six increments from 250 to 0, followed by seven from 0 to 7, making 13.
The elapsed-under-256 assumption is essential. Without it, the same readings also permit 269 ticks: 13 plus another complete 256-tick cycle. Further cycles would yield other possibilities. The readings alone do not uniquely reveal how many wraps occurred.
A separate exercise starts at 100 and ends at 118 under the same assumptions. The modular difference is 18. Neither exercise supplies the clock frequency, so neither answer can be converted into seconds without another fact.
Question 4: distinguish the mathematical model from C expressions
Question: Does subtracting two eight-bit unsigned objects in C necessarily perform an eight-bit modular subtraction before anything else?
No. Integer promotions and conversions matter. CERT's unsigned-integer guidance discusses unsigned arithmetic and these type rules. Narrow operands may be promoted to int when that type can represent their values. The expression type and the eventual storage type are separate questions.
In the counter model, the desired result is a mathematical remainder in the range 0 through 255. An implementation must deliberately achieve that result with appropriate types and conversions for the actual C environment. Do not describe signed overflow as a guaranteed wraparound mechanism.
Before proposing code, state the language version, available integer types, operand ranges and the maximum elapsed interval. A host calculation can verify a finite arithmetic case, but it cannot prove a peripheral's tick direction, frequency or read consistency. This article deliberately uses pseudomathematical models rather than target-specific timer code.
Question 5: trace a ring buffer with one reserved slot
Question: A single-threaded abstract ring has four physical slots, indexed 0 through 3. One slot is always left empty. head denotes the next write position and tail the next read position. Initially head = 3 and tail = 1. How many items are stored, and can one more be added?
Stored items occupy positions 1 and 2. The count is (head − tail) modulo 4 = (3 − 1) modulo 4 = 2. Because one of four slots is reserved, usable capacity is three, so there is room for one additional item.
Enqueueing writes at slot 3 and advances head to 0. The stored count becomes (0 − 1) modulo 4 = 3. The next proposed head would be 1, equal to tail, so another enqueue is refused under the one-empty-slot rule.
Initial: head 3, tail 1, stored 2, capacity 3
After one enqueue: head 0, tail 1, stored 3
Next-head candidate: 1, equal to tail
Therefore the buffer is full under this convention.
This convention distinguishes empty (head == tail) from full (next(head) == tail). Another design could use a count or a separate full flag and have different capacity rules. Do not mix conventions mid-answer.
Question 6: what changes after a dequeue?
From the full state head = 0, tail = 1, dequeue the item at slot 1 and advance tail to 2. The stored count becomes (0 − 2) modulo 4 = 2. One usable position is available again.
This is a complete finite trace in a single-threaded abstract model. It does not establish safe producer/consumer operation between tasks, interrupts or processor cores. Concurrent designs require appropriate atomicity, ordering, ownership and target-specific considerations that the trace does not supply.
An interviewer can change the head/tail inputs to see whether you apply the convention rather than memorise the capacity answer. Always restate which index means next write and which means next read; reversed definitions would change the interpretation.
Question 7: what does volatile not guarantee?
Question: Does declaring an object volatile make a shared buffer safe between an interrupt and ordinary code?
The declaration alone does not establish a complete synchronisation design. GCC explicitly states that nonvolatile accesses are not ordered with respect to volatile accesses and that volatile access does not act as a memory barrier for nonvolatile writes. Its documentation also identifies implementation-dependent aspects of volatile access.
Therefore, do not present volatile as a portable lock, an atomicity guarantee for every access size or a universal ordering solution. State the compiler, target, shared data, access widths and required relationship between operations before evaluating an implementation. A declaration is not a successful hardware test.
Practise answering with a check and a limit
For each question, explain the assumptions, show one worked result and state what would invalidate the conclusion. A good practice answer for the timer includes both 13 ticks and the fewer-than-256 condition. A buffer answer includes capacity three and the single-threaded model. The volatile answer names a guarantee that the declaration does not supply.
The panel interview guide can help practise handling two questions without losing either. The tech-job search guide shows how to describe bounded checked practice accurately on a resume. Neither establishes that these exercises satisfy a particular employer's requirements.
Frequently asked questions
Are these actual company interview questions? No. They are original practice exercises.
Does the timer result prove elapsed seconds? No clock frequency is supplied, so it establishes only ticks under the stated assumptions.
Can four physical slots always store four items? Not in the one-empty-slot convention used here; usable capacity is three.
Does a correct host calculation prove hardware safety? No. Device semantics, concurrency and timing need their own applicable evidence.